1. Field of the Invention
The present invention relates to a flash memory device, and more particularly, to a flash memory device and a method of driving the same in which reliability of set information is determined in an initial read operation.
2. Description of the Related Art
A flash memory device is a nonvolatile memory device capable of electrically erasing and storing data. The flash memory device has power consumption lower than that of a recording medium based on a magnetic disk memory, and an access time as fast as a hard disk of the magnetic disk memory.
The flash memory device may be classified as a NOR type or a NAND type according to the state of connection of cells and bit lines. In a NOR type flash memory device, at least two cell transistors are connected in parallel with a single bit line. The NOR type flash memory device stores data using channel hot electrons and erases data using Fowler-Nordheim (F-N) tunneling. A NAND type flash memory device has at least two cell transistors serially connected to a single bit line. The NAND type flash memory device stores and erases data using F-N tunneling. The NOR type flash memory device has a high operating speed, although the NOR type flash memory device cannot be highly integrated due to high current consumption. The NAND type flash memory device has an advantage in terms of high integration because the NAND type flash memory device uses a cell current lower than that of the NOR type flash memory device.
FIG. 1A is a circuit diagram of memory cells included in a conventional NAND type flash memory device. Referring to FIG. 1A, the conventional NAND type flash memory device includes memory cells M11, M12, M13 and M14, multiple wordlines WL11, WL12, WL13 and WL14, select transistors ST1 and ST2, and a bit line BL. The memory cells M11, M12, M13 and M14 and the select transistors ST1 and ST2 form a string and are connected in series between the bit line BL and a ground voltage VSS. The conventional NAND type flash memory device programs all the memory cells connected to a single wordline at a time because the conventional NAND type flash memory device uses a low cell current.
FIG. 1B is a circuit diagram of memory cells M21 through M26 included in a conventional NOR type flash memory device. Referring to FIG. 1B, the memory cells M21 through M26 are connected between bit lines BL1 and BL2 and a source line CSL. The conventional NOR type flash memory device programs a predetermined number of memory cells through a one-time programming operation because the programming of the conventional NOR type flash device involves high current consumption.
Set information required for a memory operation must be included in a memory device. An electrical fuse (E-fuse) method is a method that stores information in a memory cell, reads the information when a memory chip is operated and turns on/off a corresponding switch to transmit the information. The information stored based on the E-fuse method includes DC trim information, option information, repair information and bad block information for operation of the memory chip. This information is previously stored when a specific region of memory cells is tested.
When power is applied to the memory chip, the set information is read and stored in a latch, and a corresponding switch is turned on/off using the information stored in the latch. As such, various DC levels are set using the information required for the memory operation and column defects and block defects are repaired using the information.
However, DC trim information cannot be used while the set information is read because reading the set information stored based on an E-fuse method includes reading various information items required for the operation of a chip. That is, when power is applied to the flash memory device to read the set information, a DC level, set as a default value, is used to read the set information. Accordingly, the set information is read without using the DC trim information, and thus an error may be generated in the read data, which can result in an error in the set information stored in a latch included in the chip. Furthermore, when the operation of the flash memory device is set using the set information stored in the latch, the operation can be set incorrectly. Therefore, reading information stored based on an E-fuse method and storing the read information in a latch is not reliable.